THIRTEENTH  INTERNATIONAL

 

C.M.P. PLANARIZATION

FOR ULSI MULTILEVEL INTERCONNECTION

CONFERENCE

 

Tuesday, March 4, 2008

OPENING SESSION - 9:00 A.M.

Welcoming Remarks

Dr. Thomas E. Wade, Gen. Chmn.

University of South Florida

 

 

Coffee Break 9:45 AM – 10:00 AM

 

 

 

 

Tuesday, March 4, 2008

 

Box Lunches - 12:00 - 1:00 P.M.

Visit Industrial Exhibition/Poster Presentations

 

SESSION III - 1:00 P.M. - 3:00 P.M.

VLSI MULTILEVEL INTERCONNECTION

CMP DIELECTRIC PROCESSES

3.A “Optimizing CMP of Ultra-Low-k Dielectrics” by R.H. Dauskardt, T.S. Kim; STANFORD UNIVERSITY; Stanford, CA; and T. Konno, Q. Zhong, M. Peterson and H. Tam; JSR MICRO; Sunnyvale, CA.
Invited Paper

3.B “Investigation of Copper CMP Induced Porous Low-k Film Degradation for 45 nm Technology and Beyond” by S. Gall, C. Euvrard; CEA-DRT-LETI; Grenoble, FRANCE; S. Petitdidier, M. Rivoire; ST MICROELECTRONICS; Crolles, FRANCE; and F. Durix; EBARA EUROPE; Gernoble, FRANCE.
Invited Paper

3.C “Optimization of a Hybrid Fixed Abrasive CMP Process for HARP-Based STI Planarization” by G. Santoro, O. Nguyen and A. Cockburn; APPLIED MATERIALS; Leuven, BELGIUM; G. Menk, APPLIED MATERIALS; Sunnyvale, CA; and P. Ong and K. Devriendt; IMEC; Leuven, BELGIUM.

3.D “A Comparative Study of Ceria-Based and Silica-Based Slurries for 32 nm Shallow Trench Isolation Chemical Mechanical Planarization” by J.E. Cummings, M.D. Smalley and D.F. Canaperi; IBM @ ALBANY NANOTECH; Albany, N.Y.; S.S.P. Rao; IBM WATSON RES. CTR; Yorktown Heights, N.Y.

3.E “Pattern Evolution Studies in STI CMP via Real-Time Shear and Down Force Spectral Analyses” by Y. Sampurno, F. Sudargho, Y. Zhuang and A. Philipossian; UNIV. Of ARIZONA; Tucson, AZ; and T. Ashizawa, H. Morishima; HITACHI CHEMICAL; Tokyo, JAPAN.

— POSTER PAPERS —

3.F “ILD CMP Characterization Using Interferometry” by P. Beckage, K. Cox and C. Yim; SPANSION; Austin, TX.

3.H “Effect of Shallow Trench Isolation Depth on the Gate Contact Pattern Deformation in STI Chemical Mechanical Polishing” by K. R. Cho, S.H. Jeong, J.S. Ohn, J.I. Song, S.T. Moon, Y.S. Jeong, J.H. Moon, K. Lee and J.W. Han; DONGBU HITEK; Chungbuk, KOREA.

3.I “Process Optimization With 300 mm Oxide/STI Pad” by J.Y. Kim, D. Huang, M. Lube; PRAXAIR ELECTRONICS; Dansbury, CT; and R. Caramto; STATE UNIV. Of NEW YORK; Albany, N.Y.

SESSION IV - 3:15 - 5:00 P.M.
VLSI MULTILEVEL INTERCONNECTION
CMP PROCESS MODEL & SIMULATION
 

Chairman:   Dr. Reinhold Dauskardt

                    STANFORD UNIVERSITY

                    Stanford, California

4.A “Leveraging Physics-Driven CMP Models in Manufacturing” by A. Gower-Hall, B. Lee, S. Doddi, T. Gbondo-Tugbawa and E. Drege; CADENCE DESIGN SYS; San Jose, CA
Invited Paper

4.B “Maximum Scratch Width in Chemical-Mechani-cal Polishing” by T. Eusner, N. Saka and J. H. Chun; M.I.T.; Cambridge, MA.

4.C “Design for Manufacturing Opportunities in CMP Modeling” by D. Dornfeld; UNIVERSITY Of CALIFORNIA; Berkeley, CA.
Invited Paper

4.D “Investigation of Slurry Particle Interaction and Heat Transfer Dynamics at the Pad-Wafer Contact Level in CMP” by G.P. Muldowney; ROHM & HAAS; Newark, DE.
Invited Paper

 

Wednesday, March 5, 2008
 

 

 

Coffee Break 10:00 AM - 10:15 AM

 

  

Wednesday, March 5, 2008

 

SESSION VI - 10:15 AM - 12:00 P.M.

VLSI MULTILEVEL INTERCONNECTION

 C.M.P.  CONSUMABLES - SLURRY

 

 

Chairman:  Dr. Mansour Moinpour

                   INTEL CORP.

                   Santa Clara, California

 

 

6.A “Elucidating Advanced Inhibitor Material in Copper CMP: K-Sorbate as a Passivator in Copper CMP Slurries” by M. Tamir and Y. Ein-Eli; ISRAEL INSTITUTE OF TECH; Haifa, ISRAEL; J. Vaes; IMEC; Leuven, BELGIUM.

6.B “Correction Between CMP Slurry LPC and Wafer Defect Level Demystified” by Y. Lan; CLARKSON UNIV.; Potsdam, N.Y.; R. Schrob; LEVITRONIX; Waltham, MA; Y. Li; BASF; Ludwigshafen, GER-MANY
Invited Paper

6.C “Mechanism of Copper CMP in Selected Slurries With Electrochemistry, Ellipsometry and XPS as Detective Tools” by V. Brusic, J. Keleher, D. White, J. Parker, J. Aggio and G. Burns; CABOT MICRO’ Aurora, IL.
Invited Paper

6.D “Sensor-Based Investigations into the Effects of Slurry Chemistry on MRR and Ra in Copper CMP and Copper ECP” by R. Komanduri, U. Phatak and S. Bukkapatnam; OKLAHOMA STATE UNIV; Stillwater, OK.

6.E “The Real Impact of Selectivity on STI CMP Performance” by C. Zedwick, D. Merricks, S. Frink, B. Santora and B. Her; FERRO ELECTRONIC MAT’L; Penn Yan, N.Y.
Invited Paper
 

— POSTER PAPERS —

6.F “Technology for Controllable Removal Rate Selectivity in Barrier-CMP Slurry” by T. Kamimura, T. Saie, Y. Nishiwaki, H. Seki, S. Yasunami; FUJIFILM; Shizuoka, JAPAN.

6.G “Performance Characterization of Small Abrasive Colloidal Silica CMP Slurries” by R.K. Singh, C.R Wargo; ENTEGRIS; Billerica, MA.; B. Mullee; SILCO ELECTRONIC MAT’L; Portland, OR.
 

Wednesday, March 5, 2008

6.H “Novel Slurries of Hybrid Inorganic - Organic Abrasive Microparticles for Oxide CMP” by C. Coutinho, S. Mudhivarthi, V. Gupta and A. Kumar; UNIV. Of SOUTH FLORIDA; Tampa, FL.

6.I “Effect of Frictional Aspects of Silica and Ceria Based Slurries on Material Removal in Oxide CMP” by B. Park, H. Lee, K. Park, Y. Kim and H. Jeong; PUSAN NAT’L UNIV.; Busan, KOREA.
 

SESSION VII - 1:00 P.M. - 2:00 P.M.
VLSI MULTILEVEL INTERCONNECTION
DEDICATED TIME FOR CMP
POSTER PAPERS, EXHIBIT VIEWING

 

SESSION VIII - 2 P.M. - 4:45 P.M.
VLSI MULTILEVEL INTERCONNECTION
CMP INSTRUMENTATION &
CMP CONSUMABLES - PADS
 

Chairman: Dr. Frank Mauersberger
            AMD
            Dresden, Germany

CMP INSTRUMENTATION

8.A “Optical System for On Line Monitoring Slurry” by M. Rabhi, J.Y. Bottero, A. Masion; CEREGE; Provence, FRANCE; S. Tisserand, M. Hubert, S. Gautier; SILIOS; Rousset; FRANCE; and C. Roze; CORIA UMR; Roven, FRANCE.

8.B “CMP Metrology for Barrier, Low-k Dielectric Stack and Interconnect Thickness Using X-Ray Techniques” by D. Mateja, M. Denham; CABOT MICRO; Aurora, IL; D. Agnihotri, H. Celio, J. Imhof; JORDAN VALLEY SEMI; Austin, TX.

8.C “Oxide Thickness Profile Measurement by Dispersive White-Light Interferometry in CMP Process” by H. Jeong; G & P TECHNOLOGY; Busan, KOREA; B. Park, Y. Kim; PUSAN NAT’L UNIV; Busan, KOREA; H. Kim; BUSAN R & D CTR; Busan, KOREA; and Y.S. Ghim, J. You and S.W. Kim; KAIST; Daejeon, KOREA.
 

Wednesday, March 5, 2008

8.D “Evaluation of the nVision Endpoint Detection System in Magnetic Head Wafer Production” by C. Burkhard, M. Topcu; WESTERN DIGITAL; Fremont, CA; L. Yao, A. Dalrymple and R. Treur; STRASBAUGH; San Luis Obispo, CA.
 

— POSTER PAPERS —

8.E “Bench Top Dual-Mode eCMP/CMP Polisher With Multi-Sensing Metrology” by V. Khosla and M. Vinogradov; CTR. for TRIBOLOGY; Campbell, CA.

8.F “BEOL Trenches Post Copper CMP Measurement With Scatterometry (Optical CD)” by R. Teo, R. Getin, K. Tan, K. Kong; KLA-TENCOR; SINGAPORE.
 

CMP CONSUMABLES - PADS

8.G “Dynamic Pad Asperity Population Balance for Conditioning and Polishing” by T.A. Ring; UNIV. of UTAH; Salt Lake City, UT; A. Prasad, J.A. Dirksen; CABOT MICROELECTRONICS; Aurora, IL.

8.H “Effect of Pad Break-In Time and In-Situ Pad Conditioning Duty Cycle for Porous and Non-Porous Pads in CMP” by Y. Sampurno, Y. Zhang; UNIV. Of ARIZONA; Tucson, AZ; L. Borucki, A. Philipossian; ARACA; Tucson, AZ; and S. Misra, K. Holland; NEOPAD TECHNOLOGIES; Sunnyvale, CA.


 

SESSION IX - 4:00 P.M. - 6:00 P.M.
VLSI MULTILEVEL INTERCONNECTION
CMP PROCESSES, RELIABILITY &
CONDUCTORS
 

Chairman: Dr. Jan Vaes
          IMEC
          Leuven, Belgium

 

CMP PROCESSES

9.A “Study of the Sacrificial Polymer for Chemical Mechanical Planarization Process” by J.W. Lee, B.U. Yoon, C.K. Hong, W.S. Han and J.T. Moon; SAMSUNG ELECTRONICS; Gyeonggi, KOREA.

9.B “Challenges of Integration of Porous Low-k Dielectrics and Advance Barrier Materials” by M. Rao, T. Wieder, D. Tamboli and G. Banerjee; AIR PRODUCTS & CHEMICALS; Allentown, PA.
Invited Paper
 

— POSTER PAPERS —

9.C “Linear Relationship Study Between SiO2 and Poly Silicon Polish Rate” by J. H. Zhang, B. Stephenson, J. Radja; ST MICROELECTRONIC; Carrollton, TX.

9.D “Keeping a CMP Process On Line” by R.L. Rhoades, ENTREPIX; Tempe, AZ.
 

CMP RELIABILITY ISSUES

9.E “Challenges for CMP Processes in the 45 nm and 32 nm Contact Module” by F. Mauersberger, D. Zschaebitz and M. Heinz; AMD; Dresden, GERMANY; O. Loeffler; ADV. MASK TECH; Dresden, GERMANY
Invited Paper

9.F “Particle Charge Effect on CMP Defectivity” by C.L. Hsu, J.Y. Fang, H.N. Tai, C.C. Huang and S.F. Tzou; UNITED MICRO. CORP; Taiwan, R.O.C.; Q. Ye, E. Calaltarla, H. Li and C.F. Dai; ROHM & HAAS ELECTRONIC MAT’L; Newark, DE
 

— POSTER PAPERS —

9.G “Edge Defect Improvement of STI-CMP Through Optimizing of Retaining Pressure” by K. C. Choy, A. Gupta, K.W. Chai; CHARTERED SEMI; SINGAPORE.
 

CMP CONDUCTOR PROCESSES

9.H “Selection Criteria for Consumables and TheirApplication for Chemical Mechanical Polishing of Tungsten" by S.M. Gallus, INFINEON TECH; Regensburg, GERMANY; D. Wecker; INFINEON TECH; Munich, GERMANY
Invited Paper

9.I “Study of Tungsten CMP Impact on the Alignment for 65 nm DRAM BEOL Process” by K.W. Chung, A.H. Liu and C.K. Lin; NANYA TECH; Taiwan, R.O.C.; and N. Schittenhelm, U. Malkoc; QIMONDA; Dresden, GERMANY.

 

 

 

 

Thursday, March 6, 2008

 

 

 

 

 

 

Thursday, March 6, 2008

 

SESSION XI - 10:15 A.M. - 12:00 P.M.

VLSI MULTILEVEL INTERCONNECTION

CMP NOVEL PROCESSES

 

 

Chairman: Dr. Ara Philipossian

                   UNIVERSITY OF ARIZONA

                    Tucson, Arizona

 

11.A    “Polymer CMP Investigation” by V. Balan, F. Delegue; CEA-LETI MINATEC; Grenoble, FRANCE; D. Scevola and M. Rivoire; ST MICRO-ELECTRONICS; Crolles, FRANCE

 

11.B   “Wafer Thinning and Planarization Tech-nology for 3D Interconnects” by J. Vaes, R.C. Texeira and B. Swinnen; IMEC; Leuven, BELGIUM.

         Invited Paper

 

11.C “Oxide?Polysilicon CMP Process Integration for Novel Graphene and Carbon Nanotube Devices” by C.L. Borst, S.G. Bennett, D.R. Steinke, Z.R. Robinson, J.G. Ryan and J.U. Lee; STATE UNIV. Of NEW YORK; Albany, N.Y.

         Invited Paper

 

11.D “CMP Profilometry With Carbon NanoTubes” by D. Fong; VEECO METROLOGY; Santa Barbara, CA.

 

 

 

 

 

 

Thursday, March 6, 2008

 

SESSION XII - 2:00 P.M. - 4:00 P.M.

VLSI MULTILEVEL INTERCONNECTION

C.M.P. PAD CONDITIONERS,

POST- CLEANING & MODELING II

 

Chairman: Dr. Alexander Tregub

                   INTEL CORP.

                   Santa Clara, California

 

C.M.P.  PAD CONDITIONERS

 

12.A “The Effect of CMP Conditioner Design” by N. Rikita, H. Kobayashi, M. Nakamura and K. Chida;  MITSUBISHI MAT’L; Saitama, JAPAN

Invited Paper

 

12.B “Characterizing Diamond Disc Substrate Loss and Diamond Micro-Wear During Copper CMP” by X. Wei, J. Cheng, A. Meled, Y. Zhuang and A. Philipossian; UNIV. Of ARIZONA; Tucson, AZ; L. Borucki; ARACA; Tucson, AZ; M. Moinpour; INTEL; Santa Clara, CA; and D. Hooper; INTEL; Rio Rancho, NM

Invited Paper

 

— POSTER PAPERS —

 

12.C “High Pressure CMP With Low Stress Polishing: The Enabling Technology for the Manufacture of  Future 450 mm Wafers” by J.C. Sung; KINIK; Taiwan, R.O.C.; M.Y. Tsai; NAT’L CHIN-YI UNIV; Taiwan, R.O.C.; Y.T. Chen; NAT’L DEFENSE UNIV; Taiwan, R.O.C.; H. Jeong; G &  P TECH; SOUTH KOREA; M. Aoki; TOMEI DIAMOND; Tochigi, JAPAN; and M. Sung; ADV. DIAMOND SOL’N; San Francisco, CA

 

12.D  “CMP Defect Reduction Through Addition of a Conditioning Spray Bar to a Mature CMP Platform” by B. Bayer, R. Johns, B. Zimmerman; QIMONDA, Sandston, VA; and G. Willis, B. Easter; SEMPLASTICS; Daytona Beach, FL.

 

12.E “Experimental Analysis of Pad Surface Condition for Material Removal Reliability in Oxide CMP” by K. Park, J. Oh, B. Park, W. Shin and H.  Jeong; PUSAN NAT’L UNIV; Busan, KOREA.

 

 

Thursday, March 6, 2008

 

12.F  “The Organic Diamond Disk Versus Brazed Diamond Disk for Chemical Mechanical Planarization” by S. Chuang, C.L. Chen; UNITED MICRO CORP; Taiwan, R.O.C.; J.C. Sung, C.S. Chou, W. Huang; KINIK; Taiwan, R.O.C.; M. Sung; ADV. DIAMOND SOL’N’ San Francisco, CA.

 

CMP POST- CLEANING

 

12.G  “Post-Copper CMP Cleaning Challenges Beyond 45 nm - A Novel Approach” by J. Daviot; EKC TECHNOLOGY; Glasgow, SCOTLAND; J. Vaes; IMEC; Leuven, BELGIUM.

 

— POSTER PAPERS —

 

12.H “Post-CMP Cleaning Applications: Challenges and Opportunities” by R.K. Singh, D.W. Stockbower and C.R. Wargo; ENTEGRIS; Billerica, MA; and V. Khosla, N.B. Gitis; CTR. for TRIBOLOGY; Campbell, CA.

                                                                                  

12.I “Interactions of Particle Surfactant Molecules During Post-CMP Cleaning” by D. Ng, S. Kundu and H. Liang; TEXAS A & M UNIV; College Station, TX.

 

 CMP MODEL & SIMULATION - Part II

 

 

12.J   “Defectivity in Chemical Mechanical Planariza-tion: A Multi-Scale Approach” by A. Chandra, P. Karra, A.F. Bastawros, R. Biswas, P.J. Sherman; IOWA STATE UNIV; Ames, IA; and S. Armini; IMEC; Leuven, BELGIUM.

 

12.K “An Algorithm for Pad Translation in Face-Up CMP” by C. Mau, N. Saka and J.H. Chun; M.I.T; Cambridge, MA.

 

12.L  “Effects of Pad Porosity on Material Removal Rate for Low Pressure CMP” by D. Bozkaya and S. Muftu; NORTHEASTERN UNIV; Boston, MA.