NINTH INTERNATIONAL

 

C.M.P. PLANARIZATION

FOR ULSI MULTILEVEL INTERCONNECTION 

CONFERENCE

February 24 - 26, 2004

 

February 24, 2004

OPENING SESSION - 9:00 A.M.

Welcoming Remarks

Dr. Thomas E. Wade, Gen. Chmn.

University of South Florida

 

 

SESSION I -- 9:15 A.M.

KEYNOTE ADDRESS

 

“COPPER CMP MANUFACTURING

CHALLENGES FOR THE 90 nm NODE

AND BEYOND”

                                                                              

Dr. Te Hua Lin

Vice President

LAM RESEARCH CORPORATION

 

 

 

Coffee Break 9:45 - 10:00 AM

                                                                                                                                                                                                                       

 

SESSION II - 10:00 A.M. - 12:15 P.M.

VLSI MULTILEVEL INTERCONNECTION

COPPER CMP PROCESSING

 

Chairman:

Dr. Peter Burke

LSI LOGIC

Santa Clara, CA

 

 

 

2.A

“Characteristics of Copper CMP Process for Ultra- Low Pressure” by S. Hoshino, Y. Uda and E. Yamamoto; NIKON CORP; Tokyo, JAPAN

Invited Paper

2.B

“Novel Pure Organic Particles for Copper CMP at Low Down Force” by K. Cheemalapati, A. Chowdhury, V. Duvvuru and Y. Li; CLARKSON UNIVERSITY; Potsdam, N.Y.; K. Tang and G. Bian; DYNEA; Mississauga, CANADA.

Invited Paper

2.C

“Copper CMP Process for High Reliable Copper Damascene Interconnects” by Y. Yamada, N. Konishi, J. Noguchi and U. Tanaka; HITACHI LTD.; Tokyo, JAPAN.

2.D

“Electrochemical Approach in Copper CMP” by E. Ivanov; TOSOH SMD; Grove City; OH.; A. Masliy and A. Zelinsky; INST. Of SOLID STATE CHEMISTRY; Novosibirsk, RUSSIA.

2.E

“Stress Free Polishing - A Technique for Copper Removal in Advanced Technology Nodes” by J. Pallinti, S. Lakshminaryanan, W. Barth, L. Kwak, P. Burke, S. Gu, C. Falk, M. Lu, S.S. Sun, P. Wright, J. Elmer, L. Duong, S. Reder, R. Donis, W. Catabay; LSI LOGIC; Gresham, OR.; and D. Wang, B. Hannan, F. Ho, M. Rehayem; ACM RES; San Jose, CA.
Invited Paper

2.F

“300 mm Copper CMP Process Development on a Single Platen for 65 nm Technology” by R. Barker, M. VanHaneham; RODEL; Phoenix, AZ.; G. Moloney and H.M. Wang; EBARA TECH; San Jose, CA.

2.G

“Copper CMP Imposed Design Limitations” by S. Kordic; PHILIPS SEMICONDUCTOR; Crolles, FRANCE.

Invited Paper

 

 

--- POSTER PAPERS ---

 

2.H

“Copper CMP Process Development for Copper/ Low-k Materials Using A New Abrasive Free Slurries” by S. Balakumar, T. Selvaraj, B. Lin; INST. Of MICROELECTRONICS; Singapore; T. Hague, A. S. Kumar; NAT’L UNIV. Of SINGAPORE; and S. Honda; MORESCO CORP; Hyogo, JAPAN.

2.I

“Micelles and Vesicles in Abrasive-Free Copper CMP Solutions” by J. Zhao, J. Keleher and Y. Li; CLARKSON UNIV.; Potsdam, N.Y.; W. Wojtczak; SACHEM; Austin, TX.


Box Lunches - 12:15 - 1:15 P.M.

Visit Industrial Exhibition/Poster Presentations

 

 

 

SESSION III - 1:15 - 3:15 P.M.

VLSI MULTILEVEL INTERCONNECTION

CMP PROCESS CHARACTERIZATIONS

 

Chairman:

Dr. Peter Thieme

INFINEON TECHNOLOGY Dresden, Germany

 

3.A

“Prediction and Characterization of Indirect STI CMP on Selected Features Using HDP Oxide” by P. Beckage, R. Tian, A. Phillips, C. Thomas, E. Travis and T. Brown; MOTOROLA CORP; Austin, TX.

3.B

“Dynamical Mechanism of CMP Analyzed by Frictional Force Measurement” by Y. Homma, H. Kashima, K. Fukushima; HITACHI LTD; Tokyo, JAPAN; N. Sakuma; ELPIDA MEMORY; and S. Kondo; SELETE; Tokyo, JAPAN.

Invited Paper

3.C

“Known Effects of Pattern Characteristics on Copper CMP and Future Plans” by F. M. Doyle; UNIV. Of CALIFORNIA; Berkeley, CA.

Invited Paper

3.D

“Shear Force Study of Low-k / Copper CMP for 65 nm Generation and Beyond” by L.G. Chen, H.H.Lu, W.C. Chiou, Y.H. Chen, S.M. Jeng, S.M. Jang, M.S. Liang; T.S.M.C.; Taiwan, R.O.C.

3.E

“Experimental and Theoretical Analysis of Non-Rotating Copper Wafer Polishing” by L. Borucki; INTELLIGENT PLANAR: Meza, AZ.; A. Jindal, T. Cale, R. Gutman and J. Tichy; RENSSELAER POLYTECH. INST.; Troy, N.Y.; S.H. Ng and S. Danyluk; GEORGIA INST. Of TECHNOLOGY; Atlanta, GA.

3.F

“A Kinematic Study for Novel Split Pad CMP Technique” by T. Haque, A. Senthil Kumar, M. Rahman; NAT’L UNIV. Of  SINGAPORE; S. Balakumar; INST. Of MICROELECTRONICS; Singapore.

 

 

--- POSTER PAPERS ---

 

3.G

“Process Improvement of a Fixed Abrasive STI-CMP Process Through Introducing Subpad Topography” by M. Naujok, D. Souche; INFINEON TECH.; Taiwan, R.O.C.; and H.L. Lu, C.R. Hsu, T.C. Tsai and G.S. Yang; UNITED MICROELECTRONICS CORP.; Taiwan, R.O.C.

 

 

--- LATE NEWS PAPERS ---

 

3.H

“Advances in Control of Chemical Mechanical Polishing Head Pressures” J. W. Hill, M. Selser, B.A. Cozad, J.M. Harris, H. Dinh and A.K. Henning; REDWOOD MICROSYSTEMS; Menlo Park, CA.

3.I

“Effect of Different Modes of Contact on Material Removal Rate and Non-Uniformity in Abrasive Free CMP Process” T. Haque, A.S. Kumar and M. Rahman; NAT’L UNIV. Of SINGAPORE; and S. Balakumar; INST. Of MICROELECTRONICS; SINGAPORE.

 

Coffee Break  3:00 - 3:15  PM

                

SESSION IV - 3:15 - 5:00 P.M.

VLSI MULTILEVEL INTERCONNECTION

 C.M.P.  MODELING & SIMULATION - PART I

 

Chairman:

Dr. Mansour Moinpour
INTEL CORPORATION

Santa Clara, California

 

4.A

“How Mechanical is Chemical Mechanical Planarization: A Modeling Perspective” by L. Jiang; INTEL CORP; Santa Clara, CA.

Invited Paper

4.B

“A Computational Study of Slurry Flow in Grooved CMP Polishing Pads” by G. P. Muldowney; RODEL; Newark, DE; and D. T. Tselepidakis; FLUENT INC; Newark, DE.

Invited Paper

4.C

“Implementation of Model Based Tiling at STI CMP for 90 nm Technology” by P. Beckage, R. Tian, A. Phillips, C. Thomas, E. Travis and T. Brown; MOTOROLA CORP; Austin, TX.

4.D

“Initial STI Topography Enhancement for a Optimized Post CMP Topography by Integrated Simulation” by F. Meyer, P. Thieme, M. Hollatz, S. Parascandola and E. Schiller; INFINEON TECH; Dresden, GERMANY; and J.W. Bartha; TECH. UNIV. Of DRESDEN; Dresden, GERMANY.

4.E

“A Stochastic Model for the Effects of Pad Surface Topography Evolution on Material Removal Rate Decay in Chemical Mechanical Polishing” by C. Wang, P. Sherman and A. Chandra; IOWA STATE  UNIV.; Ames, IA.

 

 

--- POSTER PAPERS ---

 

4.F

“Mathematical Model to Simulate the Surface Topography of CMP Pad by Conditioning on Ebara 300 mm F-REX Polisher” by L. Nguyen, G.  Wu and T. West; THOMAS WEST; Sunnyvale, CA.; and R. Lin, J. Tung; PROMOS TECH; Taiwan, R.O.C.

4.G

“Pad Conditioner Down Force Calibration Modeling in Mirra CMP Equipment” by M.F. Koh, A.Repeso, R. Vega, M. Sivakumar, S. Tampithurai, M. Rajanogaran, B. Wang, K. C. Tan, Y.S. Koh, T. W. Leong, K.F. Lai, C.S. Poh; S.S.M.C. (PHILIPS/TSMC/SINGAPORE); SINGAPORE.

 

 

--- LATE NEWS PAPERS ---

 

4.H

“Accurate Modeling of CMP Induced Process Corners” by K. J. Chang; NAT’L TSING HUA UNIV.; Taiwan, R.O.C.; and L. F. Chang; SEQUENCE DESIGN; Santa Clara, CA.

 

Wednesday , February 25, 2004

SESSION V  -  8:30 - 10:10 A.M.

VLSI MULTILEVEL INTERCONNECTION

CMP CONSUMABLES - PART I

 

Chairman:

Dr. Ara Philipossian
UNIV. Of  ARIZONA
Tucson, Arizona

 

5.A

“A Quantitative Analysis of Multi-Scale Response of Wet and Dry CMP Pad” by S.D. Gouda, A. Bastawros and A. Chandra; IOWA STATE UNIV.; Ames, IA.

5.B

“Mechanical Role of Abrasive in Slurry and Its Impact on Low Down Force Copper CMP” by F. Sun, R. Zhou, M. Kason, R. Martinez; CABOT MICROELECTRONICS; Aurora, IL.

5.C

“Determining the Effect of Pad Grooving on the Tribological, Thermal and Removal Rate Attributes of Copper CMP” by Z.Li, Y. Zhuang and A. Philipossian; UNIV. Of ARIZONA, Tucson, AZ; and L. Borucki, INTELLIGENT PLANAR; Mesa, AZ.

5.D

“Characterization of Oxide CMP Slurries With Fumed Silica Abrasive Particles Modified by Wet Jet Milling” by G. Zwicker, H. Jacobsen and E. Stachowiak; FRAUNHOFER INST.; Itzehoe, GERMANY; and W. Lortz, R. Brandes; DEGUSSA; Hanau, GERMANY.

5.E

“The Impact of Slurry Backmixing in Determining Optimal CMP Process Conditions”

by G.P. Muldowney, J.J. Hendron and T.T. Crkvenac; RODEL; Newark, DE.

 

 

--- POSTER PAPERS ---

 

5.F

“A Model of Pad Conditioner Wear and How to Extend Pad Life by Compensating for the Wear by G. Palmgren; 3 M COMPANY; St. Paul, MN.

5.G

“TWI 711 Implement in 300 mm Production Line for Tungsten CMP at Promos” by R. Lin, J. Tung; PROMOS TECH; Taiwan, R.O.C.; G. Wu, L. Nguyen, and T. West; THOMAS WEST; Sunnyvale, CA.; R. Chan; GRAND TREND; Hsin-Chu, Taiwan, R.O.C.

5.H

“Minimizing Particles During the CMP Slurry Dispense Process” by D.J. Albrecht; NT INT’L; Minneapolis, MN.

5.I

“Handling and Filtration Characterization of a Collodial Silica Metal CMP Slurry” by R.K. Singh, G. Conner; MYKROLIS CORP. Billerica, MA; and B.R. Roberts; BOC EDWARDS; Santa Clara, CA.

5.J

“Advanced Specification and Tests of CMP Retaining Rings” by N. Gitis, J. Xiao; CTR for TRIBOLOGY; Campbell, CA; and A. Kumar, A. Sikder; UNIV. Of SOUTH FLORIDA; Tampa, FL.

5.K

“Effects of Diamond Shape and Size on Polyurethane Pad Conditioning” by M. Bubnick, S. Qamar, S. McGregor, T. Namola, T.White; ABRASIVE TECH; Lewis Center, OH.

5.L

“Copper CMP Barrier Slurries for Ultra Low-k Applications” by Z. Liu, J. Quanci and R. Schmidt; RODEL; Neward, DE.

 

Coffee Break  - 10:10 A.M. - 10:25 A.M.

 

SESSION VI - 10:25 - 12:05 P.M.

VLSI MULTILEVEL  INTERCONNECTION

CMP STI & POST CLEANING ISSUES

 

Chairman:

Dr. Abhijit Chandra
IOWA STATE UNIVERSITY Ames, Iowa

                                                                                                                                                                                                                                                                                              

CMP SHALLOW TRENCH ISOLATION

 

6.A

“Characterization and Prediction of Within Die Thickness Variation at STI CMP on 90 nm Technology” by P. Beckage, R. Tian, A. Phillips, C. Thomas, E. Travis, T. Brown; MOTOROLA CORP; Austin, TX.

6.B

“Development of a Production Worthy Fixed Abrasive STI CMP for Logic Applications at 90 nm Technology Node and Beyond” by T.C. Tsai, L. Lu, C.R. Hsu, S.K. Chu, A. Yu, G.S. Yang, S.F. Tzou and K. Liao; U.M.C.; Taiwan, R.O.C.; and M. Naujok; INFINEON TECH; Taiwan, R.O.C.

6.C

“High Selectivity Colloidal Silica Slurry for STI CMP” by I. Belov, D. Lamb, C. Forrestal, K. Pierce; PRAXAIR; Indianapolis, IN; G.M. Hey, L.  Puppe, G. Passing; H.C. STARCH; Leverkusen, GERMANY; and J. Simpson; H.C. STARCH; Newton, MA.

 

 

--- POSTER PAPERS ---

 

6.D

“Defect Metrology Issues in the Evaluation of a Low Defectivity Selective Ceria Slurry” by A.S. Lawing; P. Flanagan, Y. Epshteyn, T. Becker, N. Bishop, B. Mueller and K. Lindemann; RODEL; Phoenix, AZ.

6.E

“New Formulation for Shallow Trench Isolation CMP” by B. Santora, D. Merricks; FERRO ELECTRONICS; Penn Yan, N.Y.

 

 

CMP POST CLEANING PROCESSES

 

6.F

“A New Method for Determining the Lubrication Mechanism of Post ILD CMP Brush Scrubbing Using Spectral Analysis of the Frictional Force Signals” by A. Philipossian, L. Mustapha, D. King and J. Weaver; UNIV. Of ARIZONA; Tucson, AZ.

Invited Paper

6.G

“Post CMP Cleaning: Challenges and Direction” by J.G. Park, HANYANG UNIV.; Ansas, KOREA; and A. Busnaina; NORTHEASTERN UNIV.; Boston, MA.

Invited Paper

 

 

--- POSTER PAPERS ---

 

6.H

“Post Polish Slurry Residue Prevention in an Unconventional Planarization” by V. Dunton, B. Herner, S. Hu, J. Gu, D. Kidwell, M. Konevecki, K. Park, C. Petti, M. Mahajani, S. Radigan, U. Raghuram, V. Eckert and J. Vienna; MATRIX SEMICONDUCTOR; Santa Clara, CA.

6.I

“Optimizing the Cleaning Processes After Copper CMP” by Y. Epshteyn, T. Buley and T. Tran; RODEL; Phoenix, AZ.; and C. Tran; ATMI; Bethlehem, PA.

6.J

“Analysis of the Removal of Particles During Post CMP Cleaning” by T. Zhang, H. Liang, J.Lee; UNIV. Of ALASKA; Fairbanks, ALASKA; K. Bahten; RIPPEY; El Dorado Hills, CA.; and E. Estragnat, J.M. Martin; ECOLE CENTRAL de LYON; FRANCE.

 

Wednesday Lunch on Your Own

Not Provided by Conference

 

SESSION VII - 1:00 P.M. - 2:30 P.M.

VLSI MULTILEVEL INTERCONNECTION

DEDICATED TIME FOR CMP

POSTER  PAPERS,  EXHIBIT VIEWING

 

SESSION VIII - 2:30 P.M. - 5:00 P.M.

VLSI MULTILEVEL INTERCONNECTION

C.M.P. PROCESS CHARACTERIZATION &