EIGHTH
INTERNATIONAL
CHEMICAL-MECHANICAL POLISH (C.M.P.) PLANARIZATION
FOR ULSI MULTILEVEL INTERCONNECTION CONFERENCE
(CMP-MIC) AND EXHIBITION
February 19 - 21, 2003
MARINA BEACH MARRIOTT HOTEL
Marina Del Rey, CA.
CMP-MIC CONFERENCE OBJECTIVES
To assemble researchers and technical support personnel
from Industry, Universities and Government Laboratories from around the globe to
address all current and future issues related to CHEMICAL-MECHANICAL POLISH
PLANARIZATION as applied to on-chip ULSI Multi-level Interconnection
applications
February
19, 2003
OPENING SESSION -
8:15 A.M.
Welcoming Remarks
Dr. Thomas E. Wade, Gen. Chmn.
University of South
Florida
SESSION I
--
8:30 A.M.
KEYNOTE ADDRESS
CMP CORPORATE EXECUTIVES:
“PROGRESS TOWARDS 65 nm NODE,
LOW-k AND COLLABORATIONS ”
Matthew Neville
President & CEO
CABOT MICROELECTRONICS
Loyal Peterman, Jr.
President & CEO
ABRASIVE TECHNOLOGY
Richard Faubert
(former Pres. & CEO SpeedFam-IPEC)
Executive VP
NOVELLUS SYSTEMS
Dan Koharko
Executive VP
RODEL, INC.
Mark Merrill
Chief Marketing Exec.
KLA - TENCOR
Coffee Break 10:15 - 10:30 AM
SESSION II - 10:30 A.M. - 12:30 P.M.
VLSI MULTILEVEL INTERCONNECTION
C.M.P. CONSUMABLES - Part I
Chairman: Dr. Ara Philipossian
UNIV. of
ARIZONA
Tucson,
Arizona
2.A “Effect of Coefficient of
Friction and Process Tribology on ILD Removal Rate for Various Pads and Slurry
Abrasive Concentrations” by A. Philipossian and S. Olsen; UNIV. of ARIZONA;
Tuson, AZ. Invited Paper
2.B “A New Method for Evaluating CMP Pad Surface Conditions Using Digital
Images” by H. Kojima, T. Nishiguchi; HITACHI, LTD; Yokohama, JAPAN.
2.C “De-coupling the Chemical and Mechanical Attributes of CMP Through
Controlled Removal Rate Versus Temperature Experiments” by J. Sorooshian, D.
DeNardis, L. Charns, Z. Li and A. P h ilipossian; UNIV. of ARIZONA; Tuson, AZ;
and D. Boning; MASSACHUSETTS INST. of TECH.; Cambridge, MA.
2.D “SMART Particles for Copper CMP” by S. Hellring, B. Auger, C. McCann,
M. Fontenot; PPG INDUSTRIES; Monroeville, PA; and L. Guo, X. Shi and Y. Li;
CLARKSON UNIV.; Potsdam, N.Y.
Invited Paper
2.E “Investigating the Tribology and Removal Rate Characteristics of
Abrasive-Free Slurries for Copper CMP” by D. DeNardis, J. Sorooshian and A.
Philipossian; UNIV. of ARIZONA; Tuson, AZ; and M. Habiro; HITACHI CHEMICAL;
Ibaraki, JAPAN; and C. Rogers; TUFTS UNIV. ; Medford, MA.
2.F “Metal-Doped Silica Abrasive Slurries and Their Effect on Friction and
Removal Rate Character-istics of ILD and STI CMP” by R. Brandes, T. Knothe,
F. Klaessig; DEGUSSA CORP.; Piscataway, N.J.; and F. Menzel, W. Lortz and G.
Varga; DEGUSSA AG; Hanau, GERMANY; and T. Shibasaki, A. Philipossian; UNIV. of
ARIZONA; Tuson, AZ.
--- POSTER PAPERS ---
2.G “Nanocrystalline Alumina and
Ceria Abrasive in Chemical-Mechanical Planarization Slurries” by P. G.
Murray, H. Sarkas, D.C. Coy and R.W. Brotzman; NANOPHASE TECH.; Romeoville, IL.
2.H “Experimental Investigation of Surface Properties of Particles and Their
Effects on Copper CMP” by S.K. Govindaswamy, Y. Li; CLARKSON UNIV.; Potsdam,
N.Y.; and P. Severs, H. Xu, H. Liang; UNIV. of ALASKA; Fairbanks, AK.
2.I “Pad Conditioning and Scale-up Issues Between 200 and 300 mm Polishing”
by A. S. Lawing, C. Juras and T. Tran; RODEL; Phoeniz, AZ.
2.K “Effect of Pad Characteristics on Metal CMP” by N.H. Kim, I. P. Kim,
and E. G. Chang; CHUNG-ANG UNIV.; Seoul, KOREA; and S. Y. Kim; ANAM SEMI.;
Kyunggi, KOREA.
2.L “Study of Copper - CMP Process Performance for Interconnects Using New
Copper Slurries” by S. Balakumar; T. Selvaraj, L.B. Fu, C.Y. Li and R.
Kumar; INST. of MICRO.; Singapore; and J. Chee; CABOT MICRO.; Singapore.
2.M “Analysis of the Sub Pad Effects on the Edge in CMP” by J.S. Kim, G.
Kim, J.Y. Lee, I.H. Park; SKC CHEM.; Chungbuk, KOREA; and Y.K. Hong, J. G. Park;
HANYANG UNIV.; Ansan, KOREA.
Box Lunches - 12:30 - 1:30 P.M.
Visit Industrial Exhibition/Poster Presentations
SESSION III - 1:30 - 3:30 P.M.
VLSI MULTILEVEL INTERCONNECTION
CMP COPPER / LOW - k PROCESSES
Chairman: Dr. Peter Burke
LSI LOGIC
Santa Clara, CA.
3.A “Challenges of CMP Technology
Beyond 65 nm Node” by N. Endo; SELETE; Ibaraki, JAPAN. Invited Paper
3.B “Copper Chemical Mechanical Planarization Processes With Carbon Dioxide”
by G. M. Denison, P. M. Visintin and J. M. DeSimone; UNIV. of NORTH CAROLINA;
Chapel Hill, N.C.; and C. Bessel; V ILLANOVA UNIV.; Villanova, PA.
3.C “Copper/Low-k CMP for 0.13 micron 300 mm Dual Damascene Process” by
C.W. Chung, Y.H. Chen, W. Chang, S.M. Jang, and M. S. Liang; T.S.M.C.; Taiwan,
R.O.C.
3.D “Delamination Studies in Copper / Ultra Low-k Stack” by A. K. Sikder,
P. Zantye, S. Thagella, A. K umar; UNIV. of S. FLORIDA; Tampa, FL.; and B. M.
Vinograndov, N. V. Gitis; CTR. for TRIBO-LOGY’ Dell Aveue, CA.
3.E “Polishing of Copper Films Integrated With Low-k and Ultra Low-k
Dielectrics: An Overview” by J. Pallinti, W. Barth, S. Lakshminarayanan, L.
Kwak, P. Burke, D. Moore, H. Chi, M. Lu, W. Catabay and P. Wright; LSI LOGIC;
Santa Clara, CA. Invited Paper
3.F “Low Stress Polishing of Copper / Low-k Dielectric Structures ” by R.
K. Singh; UNIVERSITY of FLORIDA; Gainesville, FL. Invited Paper
--- POSTER PAPERS ---
3.G “Progress Towards Copper Chemical Mechanical Planarization in a Carbon Dioxide Matrix” by P.M. Visintin, G. M. Denison and J.M. DeSimone; UNIV. of N. CAROLINA; Chapel Hill, N.C.; and C. Bessel; VILLANOVA UNIV. ; Villanova, PA.
SESSION IV - 3:45 - 5:05 P.M.
VLSI MULTILEVEL INTERCONNECTION
C.M.P. MODELING & SIMULATION
Chairman: Dr. Rod Kistler
LAM RESEARCH CORP.
Fremont, California
4.A “Simulation Method for CMP
Slurry Flow With a Grooved Polishing Pad” by J.K. Eaton, C.J. Elkins and T.M.
Burton; STANFORD UNIV.; Stanford, CA.; A. Miyaji; NIKON CORP.; Tokyo, JAPAN; D.
P. Coon; NIKON RES. CORP.; San Carlos, CA.
4.B “Three-Dimensional CMP Process Model for Composite Films Wth Periodic
Patterns by B.E.M.” by T. Yoshida; Y.N.T. - Japan, Yamaguchi, JAPAN.
4.C “Integrated Modeling of Nanotopography Impact in Patterned STI CMP”
by X. Xie and D. Boning; MASSACHUSETTS INSTITUTE of TECH; Cambridge, MA. Invited
Paper
4.D “Total Software Solutions for CMP Yield Enhancement” by S.Y. Oh, K.H.
Kim, Y.J. Kwon, O.S. Nakagawa; UBITECH; San Jose, CA.; J.T. Kong, M.H. Yoo, Y.K.
Park, Y.H. Kim, K.H. Lee, T.K. Kim; SAMSUNG ELECTRONICS; Gyeonggi, KOREA,
S.K.Hahn; SKW ASSOC.; Santa Clara, CA.
--- POSTER PAPERS ---
4.E “The Effect of Wafer and Pad
Shape on Removal Uniformity - A Qualitative Analysis Using a Mechanistic Model”
by J. McGrath and C.E. Davis; UNIV. of LIMERICK; Limerick, IRELAND.
4.F “An Analytical Dishing and Step Height Reduction Model for Chemical
Mechanical Planarization” by G. Fu, A. Chandra; IOWA STATE UNIVERSITY; Ames,
IA.
4.G “Effect of Kinematic Conditions on Polishing Process in Rotary CMP”
by H. Kim, H. Kim, H. Jeong; PUSAN NAT’L UNIV.; Pusan, KOREA; and E. Lee, Y.
Shin; KOREAN INST. of MAT’L & MACHINES; Daejeon, KOREA.
Thursday , February 20, 2003
SESSION V - 9 - 10 A.M.
VLSI MULTILEVEL INTERCONNECTION
CMP INTEGRATION
Session Organizer & Chairman
Dr. Nobuhiro Endo
SELETE
Ibarake-ken, JAPAN
5.A “Corrosion Control Technique
in Copper Metallization Using Gas Dissolved Water” by M. Kodera, Y. Matsui,
H. Kosukegawa and N. Miyashita; TOSHIBA; Yokohama, JAPAN; and M. Kamezawa, K.
Ito; EBARA CORP; Fujisawa, JAPAN.
5.B “Profile Control by the Smart Simulator In Partial Polishing CMP” by
T. Senga, K. Shinjo, T. Ueda, H. Nakahira, Y. Ushio; NIKON CORP.; Tokyo, JAPAN;
and A. Une; NAT’L DEFENSE ACAD.; Kanagawa, JAPAN.
5.C “The Polishing Characteristics of Copper and Low-k CMP on 300 mm Wafers”
by K. Suzuki, S. Tokitoh, H.J.Shin and I. Matsumoto; SELETE; Ibaraki-ken, JAPAN.
5.D "0.1psi Ultra Low Pressure CMP
for Copper/Ultra Low-k Films" by S. Hoshino; Nikon Corp.; Tokyo, Japan
Coffee Break - 10:00 A.M. - 10:15
A.M.
SESSION VI - 10:15 - 12:15 P.M.
VLSI MULTILEVEL INTERCONNECTION
CMP RELIABILITY ISSUES
Chairman: Dr. Srini Raghavan
UNIV. of ARIZONA
Tuson, Arizona
6.A “Analysis of Wafer Defects
Caused by Damaged CMP Slurry Using Light Scattering and SEM Measurement
Techniques” by K. Nicholes; BOC EDWARDS; Chanhassen, MN.; M. Litchy, D.
Grant; CT ASSOC.; Bloomington, MN.; E. Hood, B. Easter and L. Cheema; AGERE
SYS.; Orlando, FL.; and V. Bhethanabotla; UNIV. of S. FLORIDA; Tampa, FL.
6.B “Defect Learning In Dielectric CMP” by C. Hawes, J. Kasthurirangan,
P. Feeney; CABOT MICRO; Aurora, IL.; and R. Campbell; KLA-TENCOR CORP.;
Portsmouth, NH.
Invited Paper
6.C “Rapid Reliability Assessment of Multilayer Copper Interconnects” by
P. McCluskey; UNIV. of MARYLAND; College Park, MD.
Invited Paper
6.D “Post Chemical-Mechanical Planarization Defect Study on 90 nm Copper /
Low-k Interconnects” by H.H. Lu, H.H. Kuo, S.N. Lee, Y.H. Chen, S.M. Jang
and M.S. Liang; T.S.M.C.; Taiwan, R.O.C.
6.E “Corrosion Issues in Chemical-Mechanical Planari-zation” by S.
Raghavan, S. Tamilmani, W. Huang; UNIV. of ARIZONA; Tuson, AZ.; and R. Small;
DUPONT - EKC TECH.; Hayward, CA.
Invited Paper
6.F “An Optimized Copper CMP Process With Low Defectivity Using Novel Copper
and Barrier Removal Slurries” by P. Gopalan, T. Buley and M. Kulus; RODEL;
Phoenix, AZ.
--- POSTER PAPERS --
6.G “Excursion Control and
Baseline Defectivity Reduction in Copper CMP” by R. Guldi, M. Eissa, V.
Korthuis, F. Cataldi, D. Ramappa, J. Ritchison and J. Shaw; TEXAS INSTRUMENTS;
Dallas, TX.; and V. Sachan, S. Fanelli, M. Vunguyen and B. Fiordalice;
KLA-TENCOR; Milpitas, CA.
6.H “DHF Application at Metal CMP Cleaning Process” by S.Y. Kim, D.Y.
Kim, H.P. Kim, C.S. Moon and J. Lee; ANAM SEMI.; Kyunggi-do, KOREA.
6.I “Robust Off-Line Micro-Scratch Inspection for Oxide CMP” by S.N. Peng,
K. W. Hsueh, S.C. Wang, S.K. Huang, C.S. Chen and W.K. Yeh; T.S.M.C.; Taiwan,
R.O.C.
Thursday Lunch on Your Own
Not Provided by Conference
SESSION VII - 1:15 P.M. - 2:15 P.M.
VLSI MULTILEVEL INTERCONNECTION
DEDICATED TIME FOR CMPPOSTER PAPERS, EXHIBIT VIEWING
SESSION VIII - 2:15 P.M. - 5:00 P.M.
VLSI MULTILEVEL INTERCONNECTION
C.M.P. NOVEL PROCESSES, CONDUCTOR PROCESS
& PROCESS CHARACTERIZATION
Chairman: Dr. Mansour Moinpour
INTEL CORP.
Santa Clara, Californai
- CMP NOVEL PROCESSES -
8.A “Research on a Novel
Planarization Method as an Alternative or Complement to CMP” by J.W.
McCutcheon; BREWER SCIENCE; Rolla, MO.
8.B “A Novel Photoresist Planarization for Deep Trench Capacitor Plate
Formation of DRAM” by C.F. Wang, H.Y. Chang, T.K.J. Liu, L.K. Chou and H.H.
Wang; WINBOND ELECTRONICS; Taiwan, R.O.C.
- CMP CONDUCTOR PROCESSES -
8.C “Improved Copper Abrasive-Free
Polishing for 90 nm Node Process” by Y. Yamada, H. Terazaki and N. Konishi;
HITACHI; Tokyo, JAPAN.
8.D “Chemical Mechanical Planarization for Copper Interconnection Layers”
by T. Hara; HOSEI UNIV.; Tokyo, JAPAN.
Invited Paper
- CMP PROCESS CHARACTERIZATION -
8.E “Statistical Experimental
Methods Used to Obtain Edge Control of 300 mm Oxide Wafer During Chemical
Mechanical Planarization” by L.C. Tinoco; INTEL CORP.; Rio Rancho, N.M.
8.F “Novel EPD Using White Light for ILD Appli-cation” by O. Matsushita,
A. Yamane, A. Isobe; TOKYO SEIMITSU; Tokyo, JAPAN.
8.G “Issues Associated With Cleaning of Nanosize Particles” by W. Fyen,
G. Vereecke, K. Xu, J. Lauerhaas, F. Holsteyns, R. Vos and P.W. Mertens; IMEC;
Leuven, BELGIUM.
Invited Paper
8.H “A Bifurcated Copper Removal Rate Mechanism” by P. Renteln, S.
Sridharan and K.Y. Ramanujam; LAM RESEARCH; Fremont, CA.
--- POSTER PAPERS ---
8.I “Evaluation of an Edge Load
Ring to Reduce Levels of CMP Microscratchs” by J. McGrath; ANALOG DEVICES;
Limerick, IRELAND; and A. Cockburn; APPLIED MATERIALS; Limerick, IRELAND.
8.J “Effect of Variations in Wafer Diameter, Wafer Shape and Thermal History
on Pressure and Stress Distributions During CMP” by J. Sorooshian and A.
Philipossian; UNIV. of ARIZONA; Tuson, AZ.; M. Goldstein; INTEL CORP; Santa
Clara, CA.; S. Beaudion; ARIZONA STATE UNIV.; Tempe, AZ.; and W. Huber;
MITSUBISHI; Santa Clara, CA.
Friday, February 21, 2003
SESSION IX - 8:15 - 10:00 A.M.
VLSI MULTILEVEL INTERCONNECTION
C.M.P. CONSUMABLES - Part II
Chairman: Dr. David Stein
SANDIA NAT’L LABS
Albuquerque, New Mexico
9.A “The Role of Pad Surface
Morphology and Mechanical Properties on the Material Removal Rate in CMP” by
A. Bastawros, A. Chandra and Y. Guo; IOWA STATE UNIV.; Ames, IA.
9.B “Hard Porous Pad for Oxide Chemical Mechanical Polish” by G. Wu, L.
Nguyen, P. Galvez and T. E. West; THOMAS WEST; Sunnyvale, CA.
9.C “Study of Slurry Selectivity and Endpoint Detection in Copper CMP
Process” by P.B. Zantye, A.K. Sikder, N. Gulati, A. Kumar; UNIV. of S.
FLORIDA; Tampa, FL.
9.D “Semi-Abrasive Free Slurry Including Acid Colloidal Silica for Copper
Chemical Mechanical Planarization” by J.H. Lim, M.H. Kim and J.D. Park;
DONGJIN SEMICHEM; Kyungki-do, KOREA.
9.E “Impact of Pad Conditioning for Chemical Mechanical Polishing of
Dual-Damascene Structures” by V. Fortin and K.C. Wu; MOSEL VITELIC; San
Jose, CA.
--- POSTER PAPERS ---
9.F “A Study of Copper
Planarization Using Ultra High Selective Copper Slurry on Sub-100 nm Device”
by D.H. Hong, J. H. Han, S.B. Lee, J. G. Kim, H.S. Sohn, J.H. Chung, S.R. Hah
and K.M. Park; SAMSUNG ELEC; KOREA.
9.G “Understanding Pads in Conditioning and Polishing of Copper” by H. Xu,
H. Liang; UNIV. of ALASKA; Fairbanks, AK; and J.M. Michel, T. LeMogne; ECOLE
CENTRALE de LYON; Lyon, FRANCE.
9.H “Behavior of EP-C600Y-75B Copper CMP Slurry Under Extensive Handling”
by R. Singh, B. Roberts; BOC EDWARDS; Santa Clara, CA.; R. Viscomi, M. Maxim, M.
Diaz; CABOT MICRO; Aurora, IL.; and G. Conner; MYKROLIS; Billerica, MA.
9.I “Two Step Chemical Mechanical Polishing Characteristics of Re-Used Silca
Slurry” by K. J. Lee, Y.J. Seo; DAEBUL UNIV.; Chonnam, KOREA; C.B. Kim; DONG
SUNG A & T; Kyunggi-do, KOREA; S.Y. Kim; ANAM SEMI; Kyunggi-do; KOREA; J.S. Park
and W.S. Lee; CHOSUN UNIV.; Gwangju, KOREA.
9.J “High Performance CMP Pads for Copper/Low-k/Ultra-Low-k Wafer Processing”
by M.J. Kulp, T. Crkvenac, C. Duong, G. Muldowney and D. James; RODEL; Newark,
DE.
9.K “CMP Tribological Study of Carrier Ring Plastic Materials” by W.G.
Easter, G.D. Willis; SEMPLASTICS; Daytona Beach, FL.; A.K. Sikder, P. Zantye and
A. Kumar; UNIV. of S. FLORIDA; Tampa, FL.
9.L “CMP In-Situ Pad Conditioning Monitoring With PadProbe” by B.
Kalenian, B.L. Pautsch, B. Sennett; STRASBAUGH; San Luis Obispo, CA.; and N.V.
Gitis, M. Vinogradev; CTR. for TRIBOLOGY; Campbell, CA.
9.M “Proper Filtration to Remove Large Particles From Copper CMP Slurries”
by M.H.S. Tseng, K. Carter, J. Marchese, M. Parakilas; CUNO; Meriden, CT.; and
Q. Arefeen, T.B. Hackett and S. Hymes; ASHLAND CHEM; Dublin, OH.
9.N “CMP Barrier Slurry Development for Technology Nodes Beyond 0.13 microns”
by C. Ye, J. Quanci, M. VanHanehem, R. Lavoie; RODEL; Newark, DE.
9.O “Optimizing Diamond Conditioning Disks for the Tungsten CMP Process”
by M. Bubnick, S. Qamar; ABRASIVE TECH.; Lewis Ctr.; OH.
9.P “Dynamic Pot-Life and Handling Evaluation of EPL2362 First Step Copper
Slurry” by B.Johl, A. Manzonie; RODEL; Phoenix, AZ.; and R. Singh; BOC
EDWARDS; Santa Clara, CA.
Coffee Break 10:00 A.M. - 10:15
A.M.
SESSION X - 10:15 A.M. - 11:15 A.M.
VLSI MULTILEVEL INTERCONNECTION
C.M.P. MODEL & SIMULATION - Part II
Chairman: Dr. Katia Devriendt
IMEC
Leuven, Belgium
10.A “A Mechanical Model for
Erosion in Copper Chemical Mechanical Polishing” by K. Noh, N. Saka and J.H.
Chun; MASSACHUSETTS INST. of TECH.; Cambridge, MA.
10.B “Metal Density Optimization With CMP - Bases Dummy Placement” by
V.Sukharev, P. Zarkesh-Ha, C.H. Chang and W. Loh; LSI LOGIC; Milpitas, CA.
Invited Paper
10.C “Multiscale and Multistep Integrated Process Simulation” by T.S.
Cale, M.O. Bloomfield, Y.H. Im, J. Seok, C.P. Sukam and J.A. Tichy; RENSSELAER
POLYTECH. INST.; Troy, N.Y. Invited Paper
--- POSTER PAPERS ---
10.D “A Theoretical Model on the
Relationship Between Wafer Surface Pressure and Wafer Backside Loading in CMP”
by G. Fu; LAM RESEARCH; Fremont, CA. and A. Chandra; IOWA STATE UNIV.; Ames, IA.
SESSION XI - 11:15 A.M. - 12:15
P.M.
VLSI MULTILEVEL INTERCONNECTION
C.M.P. SHALLOW TRENCH ISOLATION &
CMP INSTRUMENTATION & HARDWARE
Chairman: Dr. Ronald Gutmann
RENSSELAER POLYTECH. INST.
Troy, New York
CMP SHALLOW TRENCH ISOLATION
11.A “STI Defects - They’re Not
Just CMP Created” by D.J. Stein, S.C. Everist and W.E. Jaramillo; SANDIA
NAT’L LABS: Albuquerque, N.M. Invited Paper
11.B “Challenges for the Integration of Shallow Trench Isolation” by K.
Devriendt, N. Heylen and J.L. Hernandez; IMEC; Leuven, BELGIUM. Invited
Paper
--- POSTER PAPERS ---
11.C “Single Component High
Selectivity Ceria Slurry for STI CMP” by E. Oswald, B. Her; FERRO ELECTRONIC
MAT’L; Penn Yan, N.Y.
11.D “Correlation Between Trench Depth and Defects in the Shallow Trench
Isolation Chemical Mechanical Polishing Process” by K.W. Kim, Y.J. Seo, S.
W. Park; DAEBUL UNIV.; Chonnam, KOREA; S.Y. Kim; ANAM SEMI; Kyunggi-do, KOREA;
and J.S. Park, W.S. Lee; CHOSUN UNIV.; Gwangju, KOREA.
11.E “Integration- and CMP- Based DOE for STI Defect Reduction” by M.
Busse and D. Stein; SANDIA NAT’L LABS; Albuquerque, N.M.
CMP INSTRUMENTATION & HARDWARE
11.F “A Novel Air Floating Head for Next Generation CMP” by A. Isobe, A. Yamane, K. Tanaka, S. Yamada and M. Numoto; TOKYO SEIMITSU; Tokyo, JAPAN Invited Paper
--- POSTER PAPERS ---
11.G “Extending CMP to the 65 nm
Node” by D.A. Hansen, A. Namiki, F. Mitchel, S. Basak, M. Grief, F.O. Moore
and J. Schlueter; SPEEDFAM-IPEC; Chandler, AZ.; and S. Tokitou, B.U. Yoon, N.
Ohashi and S. Kondo; SELETE; Ibaraki, JAPAN.
11.H “A Novel New Dispersion for CMP Industry” by S. Mohseni, R. Eaton,
L. Gramm, G. Morr and D. Mahulikar; PLANAR SOLUTIONS; Queen Creek, AZ.
11.I “Reverse Linear CMP Technology for Copper and Low-k” by Y. Wang, M.
Desai, T. Truong, C. Uzoh and J. Yeh; NUTOOL; Milpitas, CA.
CMP-MIC LUNCHEON - 12:15 - 2:00
P.M.
"New and Exciting Developments in
MEMS Technology - An Overview"
Dr. Dale Hetherington
SANDIA NATIONAL LABS
Albuquerque, New Mexico
SESSION XI - 2:00 P.M. - 3:30 P.M.
VLSI MULTILEVEL INTERCONNECTION
C.M.P. APPLICATIONS
Session Organizer & Chairman
Dr. Rajiv K. Singh
UNIVERSITY OF FLORIDA Gainesville, Florida
11.A “Emergent CMP Applications”
by D. R. Evans; SHARP LABS; Camas, WA.
Invited Paper
11.B “Embedded Nanostructures Using CMP Fabrication Techniques” by R. K.
Singh; UNIV. of FLORIDA; Gainesville, FL.
11.C “Planarization Issues for Three-Dimensional Integrated Circuit and
Wafer-Scale Packaging Applications” by R.J. Gutmann, A. Jindal, G.
Rajagopalan, J.Q. Lu, J.J. McMahon, Y. Kwon and T.S. Cale; RENSSELAER POLYTECH.
INST.; Troy, N. Y.
Invited Paper
11.D “A History of Nickel - Iron CMP as Used in the Magnetic Head Industry”
by C.M. Pitcher; SEAGATE TECH.; Bloomington, MN.