SEVENTH INTERNATIONAL
DIELECTRICS & CONDUCTORS
FOR ULSI MULTILEVEL INTERCONNECTION CONFERENCE
(DCMIC) AND EXHIBITION
March 5, 2001
SANTA CLARA MARRIOTT HOTEL
Santa Clara, CA.
http://www.imic.org
DCMIC CONFERENCE OBJECTIVES
To assemble researchers and technical support personnel from Industry, Universities and Government Labs from around the globe to address all current and future issues related to Dielectrics & Conductors for on-chip ULSI Multilevel Interconnection applications.
OPENING SESSION - 8:45 A.M. Welcoming Remarks
Dr. Thomas E. Wade
General Chairman
University of South Florida
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SESSION I -- 9:00 A.M. KEYNOTE ADDRESS
NEW FRONTIERS IN LOW-k DIELECTRICS
Dr. Kenneth MacWilliams
Vice President & General Manager
NOVELLUS SYSTEMS, San Jose, California
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Coffee Break 9:30 A.M. - 9:45 A.M.
SESSION II - 9:45 A.M. - 11:45 A.M.
VLSI MULTILEVEL INTERCONNECTION DIELECTRICS RELIABILITY/YIELD
Chair: Dr. Robert Miller
IBM ALMADER RES. CTR., San Jose, California
- 2.A "Reliability and Critical Properties of Low-k Dielectrics: Thickness Dependence" by F. G. Shi; UNIV of CALIF.; Irvine, CA.
Invited Paper (30 minute presentation).
- 2.B "Optimization of Plasma Treatment for Post Copper - CMP Cap Deposition" by K. Ring, J. Yota, L. Camilletti, G. Li, C. Nguyen, B. Zhao & W. McArthur; CONEXANT SYSTEMS; Newport Beach, CA.; J. Hander, G. Wantroba, M. Sanganeria, and B. VanSchravendijk; NOVELLUS SYSTEMS; San Jose, CA.
- 2.C "Trends for ULSI Interconnections and Their Implications for Thermal, Reliability and Performance Issues" by K. Banerjee; STANFORD UNIVERSITY; Stanford, CA. Invited Paper (30 minute presentation).
- 2.D "A Low Thermal Budget Pre Metal Dielectric Stack Using PECVD and HDP Processing" by M. Schaekers, B. DeJeager, E. Sleeckx, I. Debusschere, M. Van Hove, A. Lauwers; IMEC; Leuven, BELGIUM; and H. Hauf; APPLIED MATERIALS; Leuven, BELGIUM.
- 2.E "200 mm Wafer Bonding for 3-D Interconnects Using Low-k Dielectrics as Bonding Glue" by J.Q. Lu, Y. Kwon, R.P Kraft, R.J. Gutmann, J.F. McDonald and T.S. Cale; RENSSELAER POLYTECHIC INST.; Troy, N.Y.
-- POSTER PAPERS --
- 2.F "High and Low Field Ratio Metal Etching" by K. J. Chang, N. Y. Tseng, L. H. Wang, T. C. Hsieh, Y. K. Hwang and S. S. Chen; TAIWAN SEMI. MFG. CO.; Taiwan, R.O.C.
- 2.G "The New Monitoring Tool for Reactive Plasma Density With Plasma Absorption Probe" by N. Toyoda, S. Takeuchi and S. Nanko; NISSIN INC.; Hyogo, JAPAN.
- 2.H "Effect of Interface and Carbon Content on Line to Line Leakage of CVD Low-k/Cu Dual Damascene Structure" by L. J. Li, S. M. Jeng, S. M. Jang, C. H. Yu and M. S. Liang; TAIWAN SEMI. MFG. CO.; Taiwan, R.O.C.
- 2.I "Characterization of Planarization Variation of BPSG Process for Inter-Layer Dielectric" by C. F. Dai, G.J. Wang, Y.Y. Chen and L. Y. Chou; MACRONIX INT'L; Taiwan, R.O.C.
SESSION IIA - 11:45 A.M. - 12:30 P.M
VLSI MULTILEVEL INTERCONNECTION
DEDICATED TIME FOR DCMIC POSTER PAPER, EXHIBITION VIEWING
DCMIC LUNCHEON - 12:30 - 1:30 P.M.
" 100-GHz-SCALE COMPUTING WITH
SUPERCONDUCTOR INTERCONNECTS"
Dr. Konstantin K. LikharevM
STATE UNIVERSITY OF NEW YORK
Stony Brook, New York
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SESSION III - 1:30 - 3:30 P.M.
VLSI MULTILEVEL INTERCONNECTION DIELECTRICS MATERIAL ISSUES
Chairman: Dr. Neil H. Hendricks
ATMI MATERIALS,
San Jose, California
- 3.A "Low Dielectric Constant, Nanoporous Organosilicates: Precursor Nature and Its Effect on Porosity" by W. Volksen, R. Miller, T. Magbitang, C. Hawker, J. Hedrick, E. Huang, M. Toney, P. Rice, R. Zafran; IBM ALMADEN RES. CTR.; San Jose, CA.; K. Rodbell, S. Cohen, M. Lane; IBM WATSON RES. CTR.; Yorktown, N.Y.; K. Lynn, M. Petkov, M. Weber; WASHINGTON STATE UNIV; Pullman, WA.; P. Ho, M. Kiene; UNIV of TEXAS; Austin, TX; M. Stavis; OBERLIN COLLEGE; Oberlin, OH.
Invited Paper (30 minute presentation).
- 3.B "Properties of PECVD Low Dielectric Constant SiOC Layer" by T. Hara, B. Sakamoto, K. Maruyama; HOSEI UNIV.; Tokyo, JAPAN; Y. Shioya, K. Maeda; S.P. L.; Tokyo; T. Ishimaru, H. Ikakura; CANON; Tokyo, JAPAN.
Invited Paper (30 minute presentation)
- 3.C "Deposition and Characterization of APCVD SiO2 Films Using Octamethyltrisiloxane (OMTS) and Ozone" by J. C. Sisson, Y. Y. Brichko, L. D. Bartholomew, S. Al-Lami and R. B. Herring; SILICON VALLEY GP; Scotts Valley, CA.
- 3.D "Chemistry and Dispense of Spin-On Low - k Materials" by J. H. Golden, E. Carrubba and J. Jung; MICROBAR INC.; Sunnyvale, CA.
- 3.E "Plasma-Enhanced Chemical Vapor Deposition a-SiCOF Films With Low Dielectric Constant" by S. J. Ding, Q. Q. Zhang, P. F. Wang, D. W. Zhang and J. T. Wang; FUDAN UNIV.; Shanghai, CHINA.
-- POSTER PAPERS --
- 3.F "CVD Low-k (ASM Aurora) Evaluation" by S. Lin, C. Jin and J. Wetzel; INT'L SEMATECH; Austin, TX.
- 3.G "A Low Dielectric Constant Spin-On-Glass For Inter- level Dielectrics" by S. J. Lee, J. Y. Kim, D. H. Lee, Y. S. Kim, C. M. Jung, S. B. Kim, P. G. Son, H. M. Kim and H. S. Yang; HYUNDAI; Kyoungki-do, KOREA.
- 3.H "PECVD SiN Performance as Barrier/Etch Stop for Damascene Copper Interconnects" by L. D'Curz and C. Bencher; APPLIED MATERIALS; Santa Clara, CA.
- 3.I "Role of Surfactants in Film Properties of Porous Dielectrics" by C. Y. Hung, Y. T. Yeh, C. J. Wang, L. M. Chen and L. P. Li; UNION CHEMICAL LABS; Taiwan, R.O.C.
- 3.J "PECVD F-TEOS Dielectric Technology for Damascene Copper Interconnects" by L. D'Cruz and C. Bencher; APPLIED MATERIALS; Santa Clara, CA.
Coffee Break 3:30 - 3:45 P.M.
SESSION IV - 3:45 - 5:30 P.M.
VLSI MULTILEVEL INTERCONNECTION CONDUCTOR MATERIALS
Chairman: Dr. Maximillian Biberger
SUPERCRITICAL SYSTEMS
Fremont, California
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4.A "Recent Developments of Copper Filling Technology in Japan" by S. Shingubara; HIROSHIMA UNIV.; Hiroshima, JAPAN Invited Paper (30 minute presentation).
- 4.B "Effects of Current Crowding and Contact Resistance on Electromigration in ULSI Interconnects" by E. C.C. Yeh; UCLA; Los Angeles, CA.
Invited Paper (30 minute presentation).
- 4.C "Fine Patterning Technology With Modified Dual Damascene Process for Local Interconnects of Sub-0.1 micron CMOS Devices" by D. H. Kim, S. B. Kim, B. J. Hwang, J. K. Park, J. I. Hong and J. W. Park; SAMSUNG ELECTRONICS; Kyungki-Do, KOREA.
- 4.D "Void-Less High Aspect Ratio Contact Technology Using Atom Layer Nucleation for 0.13 micron EmDRAM" by T. H. Haung, K. Y. Lin, C. Y. Yu, C. S. Tsai and M. H. Chi; TAIWAN SEMI. MFG. CO; Taiwan, R.O.C.
-- POSTER PAPERS --
- 4.E "Investigation of EDTA Mechanism in Copper Electroless Plating" by S. H. Cha and J. J. Kim; SEOUL NAT'L UNIV; Seoul, KOREA; and C. D. Lee; LG PHILIPS LCD; Kyoung ki-do, KOREA.
- 4.F "Using Reflected Light Spectroscopy in Integrated Metrology for Metal CMP Monitoring" by A. Ravid, A. Weingarten, V. Machavariany, D. Kaufman and D. Scheiner; NOVA MEASUREING INST.; Rehovoth, ISRAEL
- 4.G "Analysis of ULSI Interconnection Metallic Layers on Silicon Wafers by Glow Discharge Mass Spectrometry (GDMS)" by A. Efimov, M. Kasik and K. Putyera; SHIVA TECH. INC.; Syracuse, N. Y.
- 4.H "Characterization of Dishing Behavior in Copper CMP" by Y.H. Lin, H. C. Chen, R. Hsiung and J. K. Chen; UNITED FOUNDRY SERVICE; Hopewell Junction, New York.
- 4.I "Investigation of Copper Electrodeposition in the Presence of Benzotriazole as a Brightner" by S. K. Kim, J. J. Kim; SEOUL NAT'L UNIV.; Kwanak-gu, Seoul, KOREA; J. U. Bae; LG PHILLIPS LCD; Seoul, KOREA.
- 4.J "Particles Reduction and Yield Improvement for W Etch-Back by Post-Etch Ar-Flush/Purge Processes" by C. D. Young, W. Tsui, S. F. Checn, C. C. Chang; TAIWAN SEMI. MFG. CO.; Taiwan, R. O. C.
NOTICE TO AUTHORS OF POSTER PAPERSPut up posters on Monday, March 5, before 9 AM at the location designated (Salon 1 - 3). Be available to answer questions during Session IIA. Remove posters by 4 PM.